Original Date: 01/27/1997
Revision Date: 01/18/2007
Best Practice : Microelectronics Technology
Microelectronics refers to the use of thin film processing, generally associated with the semiconductor industry, in advanced electronic packaging applications. At Lawrence Livermore National Laboratory (LLNL), these applications include field emission flat panel displays, microelectro-magnetic devices, and electronic packaging. In each case, LLNL’s expertise in materials science; thin film process development; specific understanding of the science and technology of the application; and its unique ability to perform lithography on 3-D surfaces have contributed to project success.
In the area of advanced electronic packaging, goals are to improve performance; reduce system size and weight; and lower cost. Application areas include satellite electronics, supercomputers, and personal digital assistants. Specific technology focus areas by LLNL include 3-D package integration using high-speed chip-to-chip and chip-to-board connections; increasing connectivity through multilevel metallization and metal planarization techniques; reducing line capacitance and propagation delay through the development of dielectric materials having low dielectric constant; and the handling of heat dissipation through newly developed thermal management techniques. Instrumental in achieving quantum leaps in these areas is the LLNL-developed, 3-D lithography on 3-D surfaces.
Specific examples of LLNL’s microelectronics include:
Flat Panel Displays LLNL has eight collaborations on flat panel displays and four collaborations for developing display manufacturing equipment. LLNL has developed field emission display “nanocone and nanofilament” to produce a less than 0.3-micrometer gated cathode and continue work on ion tracking lithography, resistor materials, and deposition methods to reduce turn-on voltage. Low work function emitters are also under development to further reduce turn-on voltage. LLNL continues its work on a low cost printing process using sol-gel technology to produce high aspect ratio silica spacers.
High Speed Patterning of Conformal Metal Traces Three-dimensional photolithography provides conformal metal traces that provide low inductance, rugged connections, and inexpensive stacking of integrated circuits. Applications include conformal traces from GaAs integrated circuits to alumina circuit boards, stacking DRAM memory boards, and microelectro-mechanical components such as actuators and RF inductors.
Low Dielectric Constant Materials Introduction of new processes to deposit thin-film aerogel materials has reduced dielectric constants to 1.2 for multilevel interconnections. Both package and integrated circuit interconnect performance improve with lower dielectric constant. The expansion coefficient can be matched to silicon, alumina, etc. by changing aerogel composition.
Electrochemical Planarization Process Techniques have been developed to plate without voids or defects. Void-free electroplating of copper has been demonstrated at both package and ultra large scale integration dimensions. Uniformity can be achieved which is better than 3% across a six-inch wafer. Plating and polishing processes have been demonstrated to be defect free for seven-inch square multichip module circuit boards.
Active Matrix Liquid Crystal Displays (Figure 2-10) LLNL is developing a low-temperature, thin-film transistor fabrication process and polymer dispersed liquid crystal applications of thin- film transistors. LLNL is further applying its laser patterning technology to route row and column conductors to the back side of display substrates so that drivers and other electronics can be located on the back of displays. Ruggedness and reliability are improved and rework cost is reduced.
Figure 2-10. Laser Doping and Electronics on Plastic
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