This test method specifies the procedures by which fault coverage is reported for a test program applied to a microcircuit herein referred to as the device under test (DUT). This method describes requirements governing the development of the logic model of the DUT, the assumed fault model and fault universe, fault classing, fault simulation, and fault coverage reporting. This method provides a consistent means of reporting fault coverage regardless of the specific logic and fault simulator used. Three procedures for fault simulation are described in this method: full fault simulation and two fault sampling procedures. The applicable acquisition document shall specify a minimum required level of fault coverage and, optionally, specify the procedure to be used to determine the fault coverage. A fault simulation report shall be provided that states the fault coverage obtained, as well as documenting assumptions, approximations, and procedures used. When any technique detailed in this method is inapplicable to some aspect of the logic model, or inconsistent with the functionality of the available fault simulator and simulation postprocessing tools, it is sufficient that the user employ an equivalent or comparable technique and note the discrepancy in the fault simulation report. Microcircuits may be tested by nontraditional methods of control or observation, such as power supply current monitoring or the addition of test points that are available by means of special test modes. Fault coverage based on such techniques shall be considered valid if substantiating analysis or references are provided in the fault simulation report.