All fan-out from a node in a logic model is ideal,
that is, fan-out branches associated with a node emanate from a single point
driven by a fan-out origin. All fan-in to a node in a logic model is ideal;
that is, multiple fan-in branches in a node drive a single line. Figure B-10
shows a node that includes fan-in branches, a fan-out origin, and fan-out branches. Because fan-in and fan-out generally are not ideal in actual circuit layout, the actual topology of the circuit should be modeled, if it is known, by appropriately adding single-input noninverting buffers to the logic model.