The fraction of transistors comprising each G-logic
and B-logic partition, with respect to the total count of transistors in the
DUT, shall be determined or closely estimated; the total sum of the transistor fractions shall equal 1. Where the actual transistor counts are not available, estimates may be made on the basis of gate counts or microcircuit area; the assumptions and calculations supporting such estimates shall be documented in the fault simulation report. The transistor fractions shall be used in order to weight the fault coverage measured for each individual logic partition (see B.8.3.5).