(a) Concept Exploration Phase
- The identification and exploration of alternative solutions or solution
concepts to satisfy a validated need.
(b) Demonstration and Validation
Phase - The period when selected candidate solutions are refined through
extensive study and analyses; hardware development, if appropriate; test; and
(c) Full-Scale Development
Phase - The period when the system and the principal items necessary for
its support are designed, fabricated, tested, and evaluated.
(d) Production and Deployment
Phase - The period from production approval untit the last system is
delivered and accepted.
(BIT). An integral capability of the mission system or equipment which
provides an automated test capability to detect, diagnose or isolate
equipment (BITE). Hardware which is identifiable as performing the
built-in test function; a subset of BlT.
(CND). A fault indicated by BIT or other monitoring circuitry which cannot
be confirmed at the first level of maintenance.
lateney. The elapsed time between fault occurrence and failure
False alarm. A fault indicated by BIT or other monitoring
circuitry where no fault exists.
fault detection. The ratio of failures detected (by a test program or test
procedure) to failure population, expressed as a percentage.
time. The elapsed time between the detection and isolation of a fault; a
component of repair time.
resolution, fault isolation. The degree to which a test program or
procedure can isolate a fault within an item; generally expressed as the
percent of the cases for which the isolation procedure results in a given
ambiguity group size.
testability. A testability measure which is dependent only upon hardware
design and is independent of test stimulus and response data.
(ID). Provides mechanical and electrical connections and any signal
conditioning required between the automatic test equipment (ATE) and the unit
under test (UUT); also known as an interface test adapter or interface adapter
Item. A generic
term which may represent a system, subsystem, equipment, assembly,
subassembly, etc., depending upon its designation in each task. Items may
include configuration items and assemblies designated as Units Under Test.
testing. The testing of an item with the item removed from its normal
Performing activity. That activity (government, contractor,
subcontractor, or vendor) which is responsible for performance of testability
tasks or subtasks as specified in a contract or other formal document of
authority. That activity (government, contractor, or subcontractor) which
levies testability task or subtask performance requirements on another
activity (performing activity) through a contract or other document of
Retest okay. A
unit under test that malfunctions in a specific manner during operational
testing, but performs that specific function satisfactorily at a higher level
design characteristic which allows the status (operable, inoperable, or
degraded) of an item to be determined and the isolation of faults within the
item to be performed in a timely manner.
effectiveness. Measures which include consideration of hardware design,
BIT design, test equipment design, and test program set (TPS) design. Test
effectiveness measures include, but are not limited to, fault coverage, fault
resolution, fault detection time, fault isolation time, and false alarm
Test program set
(TPS). The combination of test program, interface device, test program
instruction, and supplementary data required to initiate and execute a given
test of a Unit Under Test.
document. An item specification that contains the required performance
characteristics of a UUT and specifies the test conditions, values (and
allowable tolerances) of the stimuli, and associated responses needed to
indicate a properly operating UUT.