This section presents a supplementary listing of design concern clues. The
clues have the same intent, i.e., detection of design concerns, as those marked
with an asterisk in the preceding section. These clues, however, are organized
by the type of design concern rather than by piece-part type as was done in
SINGLE FAILURE POINTS
1. Are single failure points present?
Explanation: Loss of a point where
redundant signals are tied together results in the loss of all the redundant
IMPROPERLY TERMINATED ICs
2. Do spare IC devices have open inputs?
Explanation: Open inputs of spare
IC sections cause decreased noise immunity and unnecessary power dissipation
3. Do CMOS devices with inputs external to the circuit card have pull-up or
Explanation: External inputs to CMOS devices require a
resistor to VDD or VSS to prevent component damage from possible unterminated
inputs and static discharge.
IMPROPER APPLICATION OF COMPONENTS
4. Do uncommitted switching device outputs drive other switching
Explanation: When used to drive other digital devices, an open
collector device requires a pull-up to prevent floating inputs. Similarly, a
tri-state device not used in a busing arrangement also requires a
A transistor base-driven by an open-collector transistor should also have a
pull-up or pull-down resistor to assure proper switching.
5. Are totem pole outputs of digital devices connected
Explanation: Tying totem pole outputs together may cause
6. Are compatibility requirements met at the interface of two IC
Explanation: Different technologies may require different
voltages to represent logic levels. Criteria described in RCA Application Note
ICAN-6602 must be observed for a CMOS/TTL interface.
7. Is fan-out of digital devices exceeded?
Explanation: The common
assumption that a TTL device can drive ten TTL devices is not always true.
Fan-out limits should be calculated by summing input current requirements and
comparing with the output source current.
8. Are consecutive digital devices powered from different supplies?
Explanation: When the supply voltage is below some threshold value, during
power up or power down, the output of a digital device is unpredictable. During
power down, a subsequent device powered from a supply which decays more slowly
may therefore receive unpredictable data and produce false data. Similarly,
during power up, a subsequent device powered from a supply which rises faster
may create the same problems. This type of problem is likely to occur at an
9. Are noise margin limits exceeded for digital devices?
Exceeding noise margins may cause false or undetermined logic.
10. Are input voltage or current requirements to semiconductor devices
Explanation: Exceeding manufacturers' design limits can cause
permanent damage. Refer to vendor data books for minimum and maximum input
voltages and currents.
11. Are IC devices shown with no power and/or ground connections?
Explanation: This is usually due to a drawing error, but could be a
12. Do operational amplifiers or comparators have capacitors greater than 0.1
µF connected from input to ground or as feedback elements without series
Explanation: Excessive discharge current from large
capacitors can damage unprotected inputs when power is removed from the
13. Do comparators have capacitors greater than 0.1 µF connected from output
to ground without series limiting resistance?
discharge current from large capacitors (greater than 0.1 µF) can damage an
unprotected output when the comparator switches low.
14. Do op amp inputs see equal impedances?
Explanation: Unequal impedances
seen by op amp inputs cause voltage offset errors.
LOGIC SWITCHING PROBLEMS AND
15. Do circuits experience unintended modes or outputs during power up?
Explanation: Unintended circuit modes or outputs during power up can result
in undesired system states or outputs. Verify and validate initial conditions of
digital logic during power up. Also, large capacitors may cause excessive rise
times which create timing or switching problems at power up.
16. Do RC networks in digital circuits provide the required pulse widths,
switching speeds, etc.? Explanation: RC timing problems occur in various ways.
Switching speeds and pulse widths should be analyzed and compared against
requirements to determine if a problem exists.
17. Does a digital signal sharing a common source and load split and later
Explanation: Glitches often occur as a result of the separating
and later recombining of digital signals having a common source and load.
Glitches may result in false logic causing sneak timing. Glitches are usually
detected by drawing a timing diagram.
18. Are required conditions met to support intended turn on and turn off of
Explanation: This is a general clue which can manifest itself in
numerous applications. Node or loop analysis may be required for these
difficult-to- detect problems.
19. Do large RC time constants cause excessive rise or fall times in
Explanation: Digital devices, analog switches and
comparators may exhibit unpredictable switching times and excessive power
dissipation due to imprecise switching caused by excessive input time
REDUCED RELIABILITY OF DEVICES AND
20. Is any circuitry unused or unnecessary?
Explanation: Unused or
unnecessary circuitry dissipates power needlessly and reduces system
21. Are any relay coils unsuppressed?
Explanation: When a relay is
de-energized, a transient is induced in the coil. Because the transient could
reduce the reliability of associated circuit components, transient suppression
is normally required on relay coils.
22. Are any test points unprotected, i.e., lacking isolation
Explanation: It is good design practice to provide current
limiting resistance at test points. This protects the driver in case the test
point shorts to ground or power
UNNECESSARY POWER DISSIPATION
23. Do circuits dissipate power unnecessarily?
power consumption produces unnecessary heat and should therefore be
24. Is redundancy implemented properly?
implementation of redundancy reduces system reliability.
25. Do circuits containing symmetry have any asymmetric elements or paths?
Explanation: Asymmetric elements or paths may indicate sneak circuits or
design concerns. Possible problems may include improper use of redundancy,
missing components or sneak paths.
INCREASED NOISE SUSCEPTIBILITY
26. Are grounds mixed in the same circuit?
Explanation: Mixing several
grounds in the same circuit (e.g., analog ground and power ground) may cause
ground currents, ground offset voltages, spikes or "floating"
27. Do LSTTL devices have spare inputs connected to used inputs of the same
Explanation: Tying unused LSTTL inputs to used inputs of the same gate
reduces AC noise immunity due to increased input coupling capacitance.
28. Are differentiator circuits used?
Explanation: Differentiators are
noisy and tend to be unstable, especially at high frequencies.