The key element in the use of ceramic circuit board technology
is the leadless chip carrier (LCC) package for integrated circuits (IC). As IC
complexity increased from a few gates to very large scale integrated circuits
(VLSIC) and very high speed integrated circuits (VHSIC) with 10,000 to 100,000
gates, the required number of package terminals increased from 14 to 256 or
more. The dual in-line package (DIP) with leads on 100-mil centers could not
possibly be used for the 100+ terminals--from either a space or an electrical
The industry answer to this challenge was
the LCC (Figure 3-1) with
terminals on all four sides but without leads. Terminals consist of metallized
areas on the sides and bottom of the package. Attachment to the
interconnecting circuit board is by soldering to matching footprints, forming
lap joints. These lap joint solder connections, without the compliance
provided by the leads in previous package configurations, establish the
controlling criteria for the remainder of the packaging system.
LCCs having from 16 to 84 terminals meet the requirements of
Joint Electronic Device Engineering Council (JEDEC) Publication 95 (see Appendix B ). The JEDEC
standards include two families, 50-mil and 40-mil terminal pitch, and three
types. By far the most common is Type C with 50-mil pitch (MS-004). Above 84
terminals there are as yet no generally accepted standards, although JEDEC has
proposed certain terminal counts and configurations with up to 264 terminals
and 25- and 20-mil pitch.
Examples of Standard Electronic Modules
(SEM) utilizing conventional DIP and flatpack ICs and polymer-glass multilayer
board (MLB) interconnections are shown in Figures 3-2 and 3-3. This form of
construction is the base-line reference against which the construction of
leadless components on ceramic circuit boards is evaluated. Examples of the
application of leadless components in major military systems are shown in
Figure 3-4, 3-5, 3-6, and 3-7 .
One of the most important characteristics of the interconnecting
circuit board on which the LCCs are mounted is its thermal coefficient of
expansion (TCE). Since there are no compliant elements between the terminals
on the LCCs and the mounting pads on the circuit board, shear stresses will be
set up in the solder connection whenever the module is temperature-cycled if
the circuit board TCE is not very close to that of the package. This can lead
to cracked solder joints and eventual circuit failure.
The TCE of the alumina which is used for hermetic LCCs is
in the range of6-7 ppm/°C. Many circuit board designs have been considered
which would match this TCE. One that has received wide acceptance for production
is thick film on a ceramic blank. The ceramic blank is 96% alumina with a
nominal TCE of 6.4ppm/°C. The dielectric materials which make up the bulk of the
thick film structure are designed to have this same TCE.
There are two forms of ceramic thick film
multilayer interconnect boards (MIBs), based on the conductive materials
used--noble metal (gold or gold alloys) and copper. Although there are
significant differences in their various characteristics and in their
fabrication processes, their general structures are the same. Figure 3-8 shows a cross-sectional view of a ceramic thick film MIB.
A typical sequence of operations to form a MIB starts with
a ceramic blank of the desired size and shape, usually in the range of 20 to
60 mils thick. The raw forms of the conductive and dielectric materials
have paste consistencies which permit the materials to be deposited in
precise patterns using screen printing techniques. The first conductive layer
is formed on the ceramic blank using a screen printer to apply the
conductive paste in the appropriate pattern. This is then air dried and fired in a
belt furnace at a temperature in the range of900°C.
A dielectric layer is screen printed, air dried, and fired on
the conductor, providing insulation between the first and second conductive
layers. Designated areas of the first dielectric layer, called vias, are left
exposed. The next operation applies conductive paste to these vias (via fill)
by screen printing, followed by air drying and firing. These filled vias
provide the conductive path between conductive layers. The sequence of
dielectric screen-dry-fire and via fill screen-dry-fire is generally repeated
twice more for a total of three screenings of dielectric between conductive
This entire sequence of conductive layer and multiple dielectric
layer is repeated for each conductive layer required to provide the necessary
circuit interconnections and power and ground planes. The top conductive layer
generally contains component mounting pads only, and generally uses a
conductor formulation specifically chosen for solderability. For the case of
copper thick film, a special overglaze insulating layer is also added.
Numerous inspection and test steps are involved in the process
sequence, many of them performed on a 100% basis.
There are many variations in the way in which LCCs and other
leadless components are assembled onto the MIB. The following sequence is one
of the more common.
The solder pads of each component are pretinned to remove
the protective gold and to provide a supply of solder for final attachment.
The MIB is burnished to remove oxides from the mounting pad surfaces and a
solder paste is screen printed onto the pads. While the solder paste is still
tacky, the components are placed onto the MIB with an automatic "pick and
place" machine. An oven bake drives off volatile constituents of the solder
paste, and the assembly is passed through a continuous-type vapor phase
reflow equipment which provides a uniform 215°C soldering temperature. A vapor
degreaser removes flux before it has a chance to harden. After inspection and
test, the MIB and its components are ready for the next assembly step.
In some applications, the ceramic blank not only provides a base
for the thick film interconnections but also the structural support for the
overall assembly or module. However, the more common module design employs a
metal frame both to provide structural support and to aid in the dissipation
of module heat. The frame is usually either aluminum or copper. Since these
metals have TCEs 3 to 4 times that of alumina, the adhesive that bonds the MIB
to the frame must be compliant over the entire operating and storage
temperature range so as not to cause significant bowing of the assembly.
Module connectors, test headers, and crossovers (to interconnect the two
MIBs for double-sided modules) are then mechanically attached and lap-soldered
to attachment pads to form the electrical connections. The final assembly step
is generally conformal coat. Electrical testing usually is performed before
conformal coat (to facilitate any necessary rework) and then again after
conformal coat as a final check.