In addition to performance and reliability, the decision as to
what implementation technology to use in any particular program should
consider cost. It is not possible with such a fast-moving technology to
provide stable cost estimates for the many factors that must be included in
any cost comparison. However, a brief discussion of the most significant of
these factors will provide perspective.
From a program standpoint, total cost must be considered,
including design, manufacturing, and the cost of space. In comparing costs,
the alternatives to LCCs on MIBs include DIPs and flatpacks on MLBs.
Among the implementation alternatives, there are no major
differences in design costs for a given function. Most of the design steps are
driven by the function being designed and the system requirements, regardless
of the size or number of modules. Generally the higher costs of higher density
LCCs on MIBs are offset by the reduction in board area or number of boards
compared to the alternative methods. One exception is in the layout, where the
higher interconnect density of LCCs on MIBs provides substantially higher
costs per function.
Manufacturing costs at the module level can be broken down into
materials, assembly labor, and testing. The most significant element of module
material costs is that of components, primarily ICs. In general, those
packaged in DIPs have the lowest cost and those in flatpacks have the highest,
with LCCs somewhere between.
On a square inch basis, MLBs for DIPs have the lowest cost, in
part because of lower density and in part because of the materials. The
reduced area required by flatpacks will generally result in lower board costs,
in spite of the higher routing density. Ceramic MIBs for LCCs currently result
in higher board costs per function because of materials and processing, even
though board area is substantially less than either of the other approaches.
At present, the cost of MIBs fabricated with copper thick film are equal to or
less than the cost of those fabricated with noble metals, depending on the
amount of metal used in the design.
Because of the variation in packaging density, the hardware cost
for a given function is lowest for LCCs on MIBs and highest for DIPs on
Direct labor is generally a relatively small portion of costs
for modules in production. This is particularly true for modules using DIPs on
MLBs. Modules using LCCs on MIBs assembled with automatic pick-and-place and
vapor-phase reflow match this or even reduce it. Generally the use of partial
hand placement and soldering operations for flatpacks causes that technology
to have the highest labor costs. During the system integration and production
startup, however, labor costs can become a significant portion of overall
module costs because of increased inspection, rework, and design
modifications. During this phase, the substantial advantage of LCCs on MIBs
over the others in ease of rework is most apparent.
Testing is becoming one of the most expensive phases of
manufacturing. Regardless of the packaging technique, the greater the
complexity of function on a module, the higher the testing cost for a given
function. The very high density for LCCs on MIBs, where LCC spacing is down to
50 mils, results in even higher testing cost because of the difficulty in
probing the MIB for in-circuit testing or fault tracing.
At the platform level, primarily the cabinet level, variations
in packaging density can result in substantial cost differences due to cabinet
size, cabinet footprint area, intercabinet wiring, and (indirectly) variations
in mean time to repair (MTTR). Higher density leads to greater functionality
and lower MTTR. The higher packaging density results in a substantial cost
reduction at this level.
The costs associated with the manufacture of MIBs and MIB
assemblies are controlled to a great extent by the lay-out decisions made in
the design phase.
It is not practical to attempt to assign fixed dollar and cents
costs as a function of deviations from recommended values. Each manufacturer
may have different levels of expertise and specialization with the processes
involved in MIB fabrication, and what is difficult in one location may be easy
in another. Also the state of the art is continually improving and the
difficulties decrease with time.
However, it is possible to predict the trend
of costs as a function of a number of dimensional variables. These cost-trend
factors are shown in a series of charts in Figure 3-9
which show relative cost on a
dimensionless scale as a function of the variables involved. The vertical
lines on the charts indicate the most commonly used ranges.
Chart 1 in Figure 3-9 shows relative cost as a function of
conductor line width and associated spacing. For widths greater than 10 mils,
the cost would decrease somewhat since printing yields would increase.
However, this must be traded off against the fact that total interconnect
density would be decreased, resulting in either larger board area, more
boards, or more thick film layers. For lines narrower than 10 mils, the costs
change more dynamically in the upward direction. The minimum recommended value
of 5 mils is probably practical; but below this, the difficulties escalate
rapidly at the present state of the art. However, the tradeoffs must be
considered. For example, for 5-mil lines, the interconnect density is
increased and the number of layers is decreased or the boards are smaller.
Finer lines result in less capacitance effects and higher speeds may be
The relative cost effects of via size selection are shown in
Chart 2. For very small vias, problems arise in controlling the "closing-in"
effect. For large vias, which are mainly used for heat pipes, difficulties
arise from the cracking of the dielectric glass materials around the vias.
The choice of the center-to-center dimension of the LCC
connecting pads tends to affect cost as shown in Chart 3. As this distance
decreases, the MIB interconnect density increases and more difficulty is
encountered with control of the solder joint geometry.
An increase in the number of conductive layers in a MIB
increases the cost as shown in Chart 4. There are more screenings and firings
in the processing and the material costs increase. Another factor is the yield
and rework effects. The yield is determined by the relationship
Yt = (Yl)n
Yt = Total MIB yield
Yl = Yield per layer
n = Number of layers
The yield per layer is dominated by the line width selected, the
via size, and the expertise of the manufacturer. The tradeoff here is that
with an increasing number of layers, the board size can be reduced or the
number of boards minimized.
Due to material costs, the board area has a direct effect on
increasing costs. as shown in Chart 5, and also has an effect on yields.
Larger boards require larger printers and the larger areas lead to more
possibility of printing anomalies and dust effects. The crossover area between
conductive layers would normally increase and thus increase the possibility of
interlayer short circuits. In extreme cases, ceramic breakage can also become
a factor. The tradeoff is that larger boards decrease the number of boards
required. Another factor is that if the board size is increased to accommodate
the space requirements of an easily tested system function, the test program
and test time can be decreased.
Chart 6 shows the effects of the component spacing on the board and deals
mainly with LCCs. As the LCCs are placed closer together, fabrication troubles
can arise, troubleshooting and fault isolation become more difficult, and
rework and repair with LCC removal and replacement can be extremely difficult.
As the components are placed farther apart to relieve the problems mentioned
above, the circuit density decreases, thus requiring more boards or larger